The PyTorch Foundation has published the complete session schedule for PyTorch Conference North America, set for October 20–21 in San Jose, California, announcing the program on the PyTorch blog on July 21. The two-day event expects more than 3,000 attendees from the open source AI ecosystem, and the newly published program covers training and inference, compiler internals, responsible AI, applications, and the broader PyTorch project family.
For builders deciding whether the trip is worth it, one deadline matters right now: early-bird conference passes are discounted only through Friday, July 31 — four days from today. Registration details are on the PyTorch events page, and the foundation’s full schedule is linked from the announcement.
A conference that is no longer just about PyTorch
The most telling line in the announcement is the project list. PyTorchCon NA 2026 is framed around the PyTorch Foundation’s portfolio — PyTorch itself, plus vLLM, DeepSpeed, Ray, Helion, and Safetensors — rather than the framework alone. That reflects a deliberate reshaping of the foundation over the past two years into an umbrella for open source AI infrastructure, hosted under the Linux Foundation.
Each of those names carries its own gravity now. vLLM has become a default serving engine for open-weight LLMs. DeepSpeed and Ray anchor distributed training and scaling workloads. Safetensors is the de facto safe model-weight format across the ecosystem. Helion — the foundation’s hardware-portable kernel authoring language — has been shipping rapidly, most recently extending beyond NVIDIA and AMD GPUs toward other accelerator targets, per the project’s posts on the PyTorch blog. A schedule that treats these as co-equal tracks is a snapshot of what “the PyTorch ecosystem” means in 2026: not a framework with satellites, but a stack.
What the highlighted sessions signal
The foundation called out three sessions in its announcement, and the selection is a decent map of where production ML pain currently lives.
Observability for Cudagraph workloads — presented by Natalia Gimelshein and Driss Guessous of Meta — targets one of the sharpest debugging cliffs in modern PyTorch. CUDA graphs deliver serious throughput wins by capturing and replaying GPU work, but they notoriously turn stack traces and profiling into guesswork. Dedicated observability tooling for captured-graph execution is the kind of unglamorous work that determines whether performance features actually get used in production.
TorchDynamo acceleration, comparison and debugging — from Yi Pan of UC Berkeley with Megan Frisella and Stephanie Wang of the University of Washington — goes at the compiler layer. TorchDynamo is the graph-capture front end underneath torch.compile, and the session’s framing (“accelerating, comparing, and debugging ML systems”) suggests tooling for understanding what the compiler actually did to your model — the perennial gap between compile-time promises and runtime behavior.
Scaling foundation models from broken to near-linear multi-node training — from Sheng Huang of Pinterest — is the practitioner war story slot. Multi-node scaling efficiency is where infrastructure budgets go to die, and “broken to near-linear” is the arc every platform team wants to reproduce. That this comes from Pinterest rather than a frontier lab is itself notable: efficient multi-node training is now table stakes for ordinary product companies, not just labs training frontier models.
Taken together, the highlighted trio skews hard toward systems, compilers and debuggability rather than model architectures. That is consistent with where open source AI’s center of gravity has moved: the models increasingly arrive as open weights from elsewhere, and the community’s differentiated work is the machinery that trains, compiles and serves them.
Deadlines and practicalities
Two dates from the announcement are actionable. The poster call for proposals closed on July 26 at 11:59 p.m. PDT — one day before this writing, so that window has now shut. Early-bird registration pricing runs through Friday, July 31, after which passes revert to standard rates. Sponsorship slots also remain open, pitched at organizations wanting visibility with the engineers and technical leaders who run AI infrastructure.
The venue is San Jose on October 20–21, placing the conference in the Bay Area in late October — the same corridor as much of the fall AI event circuit, which makes early travel planning worthwhile for anyone combining trips.
Why this event punches above its weight
Vendor AI conferences optimize for announcements; foundation conferences optimize for maintainers. PyTorch Conference occupies unusual ground because the people presenting are largely the people who merge the pull requests — Meta’s compiler and runtime engineers, university researchers building on the internals, and infrastructure teams from companies like Pinterest reporting what actually broke at scale.
For the open source AI community specifically, this year’s edition lands at a consequential moment. The PyTorch Foundation’s multi-project structure is young, Helion is racing to become the neutral kernel layer across increasingly heterogeneous hardware, and vLLM sits at the center of an inference market where every hyperscaler has a competing managed offering. How those projects coordinate — and whether a neutral foundation can keep pace with vertically integrated proprietary stacks — is the real subtext of the October program. The schedule going live is the routine news; what it reveals about the stack’s priorities is the story.
